Segment descriptor

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In memory addressing for Intel x86 computer architectures, segment descriptors are a part of the segmentation unit, used for translating a logical address to a linear address. Segment descriptors describe the memory segment referred to in the logical address.[1] The segment descriptor (8 bytes long in 80286) contains the following fields:[2]

  1. A segment base address
  2. The segment limit which specifies the segment size
  3. Access rights byte containing the protection mechanism information
  4. Control bits

x86-64

In x86-64, the code segment descriptor has the following form:[3]

31 24 23 22 21 20 19 16 15 14 13 12 11 10 9 8 7 0
Base Address[31:24] G D L AVL Segment Limit[19:16] P DPL 1 1 C R A Base Address[23:16]
Base Address[15:0] Segment Limit[15:0]

Where the fields stand for:

Base Address 
32 bit starting memory address of the segment
Segment Limit 
20 bit length of the segment. (More specifically, the address of the last accessible data, so the length is one more that the value stored here.) How exactly this should be interpreted depends on other bits of the segment descriptor.
G=Granularity 
If clear, the limit is in units of bytes, with a maximum of 220 bytes. If set, the limit is in units of 4096-byte pages, for a maximum of 232 bytes.
D=Default operand size 
If clear, this is a 16-bit code segment; if set, this is a 32-bit segment
L=Long-mode segment 
If set, this is a 64-bit segment (and D must be zero), and code in this segment uses the 64-bit instruction encoding
AVL=Available 
For software use, not used by hardware
P=Present 
If clear, a "segment not present" exception is generated on any reference to this segment
DPL=Descriptor privilege level 
Privilege level required to access this descriptor
C=Conforming 
Code in this segment may be called from less-privileged levels
R=Readable 
If clear, the segment may be executed but not read from
A=Accessed 
This bit is set to 1 by hardware when the segment is accessed, and cleared by software

Data segments have bit 11 clear, ignore bit 21 (L) and interpret bits 22, 10 and 9 (D, C and R) differently. Descriptors with bit 12 clear are "system descriptors" and are used for specialized purposes.

See also

References

  1. ^ Bovet, D.P., & Cesati, M. (2000). Understanding the Linux Kernel (First Edition). O'Reilly & Associates, Inc.
  2. ^ Tabak, Daniel (1995). Advanced Microprocessors. Mcgraw Hill Publishers. p. 149. ISBN 9780070628434. 
  3. ^ AMD64 Architecture Programmer's Manual Volume 2: System Programming (PDF) (Technical report). 2013. p. 80. 
  • Tabak, Daniel. Advanced Microprocessors. McGraw Hill and Co. 
  • Hall, Douglas. Microprocessors and Interfacing. McGraw Hill Publications. 

Further reading

  • Robert R. Collins (August 1998). "The Segment Descriptor Cache". Dr Dobb's Journal. 

External links

  • Intel 80386 Reference Programmer's Manual - Segment Translation


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